Asymmetric Ratioed TDC Delay Elements for Fine Time Resolution

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Daniel Van Blerkom, Ph. D
Co-Founder & CTO, SWIRLabs
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Published
June 02, 2026
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Sharper Timing from Simpler Cells

Asymmetric Ratioed TDC Delay Elements for Fine Time Resolution

Time-to-digital converters (TDCs) sit at the core of every SPAD-based timing system — direct time-of-flight LiDAR, fluorescence lifetime imaging (FLIM), quantum sensing, and more. In a delay-line TDC, a STOP edge propagates through a chain of delay elements, and timing resolution is fundamentally limited by the delay of a single element.

This poster examines an alternative: delay elements whose rising- and falling-edge transitions are deliberately ratioed asymmetrically. By tuning the relative drive strengths within each cell, the effective timing step can be reduced below a conventional single-stage gate delay, yielding finer resolution from a compact, low-overhead delay chain. The poster walks through the delay-element design, the asymmetry-versus-linearity trade-offs, and how the approach holds up across process, voltage, and temperature.

At the International SPAD Sensor Workshop (ISSW 2026) — held 1–4 June 2026 at Yonsei University in Seoul, South Korea — SWIRLabs' Daniel Van Blerkom presents this work as Poster 2.12: "Asymmetric Ratioed TDC Delay Elements for Fine Time Resolution."

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